Researchers in CSRC’s IPMAC research group are working on next-generation integrated circuits targeted at the intelligent management and advanced control of switching power converters used in the telecommunication, networking and computing industry. Our aim is to deliver robust solutions, which are capable of displacing state-of-the-art large-component-count implementations by highly integrated and optimised systems-on-chip. The solutions include advanced mixed-signal building blocks, non-linear SMPC control techniques, and design tools required for modelling, simulation and implementation. The research team comprises academic staff, full-time researchers and research students, with research grants over last three years totalling at >€1M. The IPMAC research group has established (and is interested in expanding) links to other research institutes and industry, and has a strong publication record.

Principal competencies include:

• Research, design and implementation of architectures and mixed-signal building blocks for next-generation, advanced SMPC controllers
• Data converters suitable for digital SMPC controllers
• Advanced SMPC control methods
• Modelling and simulation of SMPC controllers and plants
• Architectures and building blocks for integrated power converters
• Design, optimisation and implementation of integrated power switches and drives

Start of research activites

September 2002

Funding

Enterprise Ireland. ATRP/02/319. “Intelligent Power Management Products (IPM)”. Grant: €298,500 Enterprise Ireland. ATRP/02/319+ (Commercialisation Plus). Grant: €68,388 Enterprise Ireland. CFTD/2003/322. “Power Supply on a Chip (PSOC)”. Total Grant: Euro 484,300 (UL: €180,670; NMRC: €193,960; UCC: €109,670). Enterprise Ireland. PC/2003/104: “Programmable Voltage Reference (PROGREF)”. Grant: €85,940 Enterprise Ireland. TD/2005/219: “Economic Bi-directional Data Link for Switching Converters (EBDALISC)”. Grant: €281,717 Enterprise Ireland. ILRP/05/PEIG/3: “Digital Power Controller (DPC)”. Grant: €336,621

Publications	Books / book chapters: 0 Journal publications: 1 Conference proceedings: 7 Published technical reports: 1 Workshop/seminar contributions: 3
Patents / Applications	Patents issued: 0 Patent applications: 1
Researchers	Staff Researchers: 3 (GK, AK, AR) Postdocs: 1 (MH) Academics: 1 (KR) Visiting Scholars: 0
Research students	M.Eng enrolled: 1 (TJK) PhD enrolled: 5 (EOM, SM, GK, AK, MS) M.Eng graduated to date: 2 (ML, EOR) PhD graduated to date: 0
Prototypes / Tapeouts	Tapeouts: 2 (CMOS 0.35um) FPGA: Various prototypes (Xilinx Spartan II/III)
Commercialisation	License agreements: 0 Start-up companies set up: 1
Other	Winner in 2004 Campus Innovation Award business plan competition
Available tools/equipment	Cadence, Synopsis, Tanner Xilinx ISE Matlab, Simulink

Graduated Research Students	Eoghain O’Reilly (M.Eng.)
Research Students Transferred to PhD	Martin Scharrer
Research Proposals Submitted	Enterprise Ireland. ATRP/02/319+. Accepted for funding (€68,388). Enterprise Ireland. TD/2005/219. Accepted for funding (€281,717). Enterprise Ireland. ILRP/05/PEIG/3. Accepted for funding (€336,621).
Publications	O'Mathuna, S.C.O., O'Donnell, T., Wang, N., Rinne, K., “Magnetics on Silicon: An Enabling Technology for Power Supply on Chip”, IEEE Transactions on Power Systems, pp. 585, May 2005 Kennedy, G., Rinne, K., PESC 2005, “A Programmable Bandgap Voltage Reference CMOS ASIC for Switching Power Converter Integrated Digital Controllers” Kelly, A., Rinne, K., PESC 2005, “High-Resolution DPWM in a DC-DC Converter Application Using Digital Sigma-Delta Techniques” Kelly, A., Rinne, K., APEC 2005, “Control of Dc-Dc Converters by Direct Pole Placement and Adaptive Feedforward Gain Adjustment” O’Malley, E., Rinne, K., APEC 2005, “A 16-bit Fixed-Point Digital Signal Processor for Digital Power Converter Control” Lin, W., Rinne, K., Lu, Z., Hua, G., APEC2005, “A High-Efficiency Gate-driver Scheme of Synchronous Rectifiers for Magamp Regulation Applications” Kennedy G., Rinne K., IMTC05, “A Programmable Bandgap Voltage Reference CMOS ASIC”, IEEE Instrumentation and Measurement Conference, Ottawa, Canada, May 2005
Patents	Summary IDF for project IPM drafted, for submission to UL ILO
Tape-outs and Prototypes	IPM ASIC taped out and manufactured (0.35um AMS) IPM mixed-signal FPGA/ASIC/power stage prototype implemented PROGREF ASIC taped out and manufactured (0.35um AMS) PROGREF FPGA/ASIC prototyping system implemented
Commercialisation	Comprehensive market study carried out by AR (funded by ATRP/02/319+) as a pre-requisite to attract VC funding, in preparation of formation of startup company Powervation Ltd. Visits/presentations to potential partners (Philips Semiconductors, ST Microelectronics).
Other